By Bruno Zatt, Muhammad Shafique, Sergio Bampi, Jörg Henkel (auth.)
This booklet indicates readers how one can strengthen energy-efficient algorithms and architectures to permit high-definition 3D video coding on resource-constrained embedded units. clients of the Multiview Video Coding (MVC) regular face the problem of exploiting its 3D video-specific coding instruments for expanding compression potency on the expense of accelerating computational complexity and, for that reason, the strength intake. This publication permits readers to lessen the multiview video coding strength intake via together contemplating the algorithmic and architectural degrees. assurance comprises an advent to 3D movies and an in depth dialogue of the present cutting-edge of 3D video coding, in addition to energy-efficient algorithms for 3D video coding and energy-efficient structure for 3D video coding.
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Additional resources for 3D Video Coding for Embedded Devices: Energy Efficient Algorithms and Architectures
264 standard: Baseline, Main, and Extended. The Baseline profile focuses on video calls and videoconferencing. It supports only I and P slice and the context-adaptive variable length coding (CAVLC) entropy coding method. The Main profile was designed for high-definition displaying and video broadcasting. Besides the tools defined by the Baseline profile, it also includes the support to B slices, interlaced videos, and CABAC entropy coding. The Extended profile targets video streaming on channels with high package loss and defines the SI (Switching I) and SP (Switching P) slices (Richardson 2010).
2 Motion and Disparity Estimation Multiview video sequences are usually captured using a high sample rate, over 30 fps, to improve the motion flow and give the observer a sense of smoother motion. This high frame rate implies in a high redundancy or similarity between neighboring frames in the time axis. 13, frames S0T0 and S0T1 are very similar; hence only the differences between them have to be transmitted. The algorithm that exploits these inter-frame similarities is the motion estimation (ME).
Data-level and instruction-level parallelisms are exploited by employing single instruction multiple data (SIMD) and very large instruction word (VLIW) architectures, respectively. Some proposals are able to implement hybrid parallelism by handling multiple cores with SIMD and/or VLIW instruction sets. In Abbo et al. (2008), the Xetal-II employs 320 SIMD processing elements with a dedicated 10 Mb on-chip frame memory. It is able to provide 107 GOPS with a 60 W power consumption with instructions designed targeting video analysis applications.
3D Video Coding for Embedded Devices: Energy Efficient Algorithms and Architectures by Bruno Zatt, Muhammad Shafique, Sergio Bampi, Jörg Henkel (auth.)