By Wenjian Yu, Xiren Wang (auth.)
Resistance and capacitance (RC) extraction is an important step in modeling the interconnection wires and substrate coupling impact in nanometer-technology built-in circuits (IC). The field-solver thoughts for RC extraction warrantly the accuracy of modeling, and have gotten more and more very important in assembly the call for for actual modeling and simulation of VLSI designs. Advanced Field-Solver innovations for RC Extraction of built-in Circuits offers a scientific advent to, and therapy of, the foremost field-solver tools for RC extraction of VLSI interconnects and substrate coupling in mixed-signal ICs. a number of field-solver suggestions are defined intimately, with real-world examples to demonstrate the benefits and downsides of every algorithm.
This ebook will profit graduate scholars and researchers within the box of electric and computing device engineering in addition to engineers operating within the IC layout and layout automation industries.
Dr. Wenjian Yu is an affiliate Professor on the division of laptop technology and expertise at Tsinghua college in China; Dr. Xiren Wang is a R&D Engineer at Cadence layout structures within the USA.
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Extra resources for Advanced Field-Solver Techniques for RC Extraction of Integrated Circuits
5 3 Fig. 01 100 80 100 60 80 60 40 40 20 0 20 0 Fig. 4 Basics of Matrix Compression Using SVD and QR Singular-value decomposition (SVD)  is a powerful tool to analyze matrices. , Um m UTm m D Im m , with Im m being a unit matrix of size m. Sm n is a diagonal matrix, whose diagonal values are called singular values, s1 s2 s3 sn 0, in form of 2 Sm n 3 s1 6 6 6 6 6 6 6 6 D6 6 6 60 6 6 :: 6: 4 s2 0 :: : :: :: : :: : : 7 7 7 7 7 7 7 7 7: sn 7 7 0 7 7 :: 7 : 7 5 0 where the empty boxes mean zero.
5, the partition of the bottom surface of the dielectric layer in Fig. 4, which includes the master conductor, is shown. This complexity brings much difficulty to the more detailed discussion about the influence of the QMM cutting number on the total computing time. 3 Algorithm Description and Analysis An interconnect structure cut from the real layout is a stratified structure and has many conductors embedded in M-stratified dielectrics. Once the original dielectric layers are decomposed into fictitious medium blocks with the QMM approach, we use the direct BEM to simulate the new multi-dielectric structure.
Another approach to automatically determine the QMM cutting numbers can be found in Yu and Wang , which selects the optimal value by estimating the overall computational time with the number of nonzero matrix entries. In applications of BEM, the partition of boundary elements is very important. It affects both speed and accuracy of BEM computation. Here, we adopt a strategy of nonuniform density partitioning. So, we can partition the boundaries into fewer elements without loss of accuracy.
Advanced Field-Solver Techniques for RC Extraction of Integrated Circuits by Wenjian Yu, Xiren Wang (auth.)