By Hong Jeong
Hong Jeong joined the dep. of electric Engineering at POSTECH in January 1988, after graduating from the dep. of EECS at MIT. He has labored at Bell Labs, Murray Hill, New Jersey and has visited the dep. of electric Engineering at USC. He has taught built-in classes, reminiscent of multimedia algorithms, Verilog HDL layout, and popularity engineering, within the division of electric Engineering at POSTECH. he's drawn to illing within the gaps among laptop imaginative and prescient algorithms and VLSI architectures, utilizing GPU and complicated HDL languages.
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Additional info for Architectures for Computer Vision: From Algorithm to Chip with Verilog
A function returns a single value, but a task does not return a value. A function has no output, but a task can have zero or more arguments of output and inout. A function responds to an input value by returning a single value, but a task can return multiple values. Because of this response, a function is used as an operand in an expression, but a task is used as a statement. A task is enabled from a statement that defines the argument values to be passed to the task and to the variables that receive the results.
The reg type is for a register that stores data temporarily in a procedural assignment. It is used to represent either a combinational circuit or a register that is sensitive to edges or levels of signals. The integer and time variable data types are not for hardware elements but for a convenient description of the operations. The integer and real types are general-purpose variables used for manipulating quantities that are not regarded as hardware registers. The time variable is used for storing and manipulating simulation-time values in cases where timing checks are required and for diagnostics and debugging purposes.
The statements can be either blocking or nonblocking, but not a mixture. ) In the Verilog loop statement, one iteration occurs in just one clock period. In this code, on the other hand, one iteration occurs in N clock periods. There are many ways to code loops. First, the counter can be either auto-incrementing or autodecrementing. The code segments above use both types of counters. There is another variation of the loop. The position of the if-statement can be either at the beginning or at the end of the statement block.
Architectures for Computer Vision: From Algorithm to Chip with Verilog by Hong Jeong